1）check power source
ERROR（NET-145)：NET<xx> in top cell <xx> is not driven b any PAD.
## power source 没有正确标记在对应net 的层次上，对照layout检查.ploc文件。
ERROR (NET-150) : NET <xxx> will not by extracted due to no current sources on this net.
WARNING(CON-196):In following nets xx(xx%) nodes and xx(xx%) resistors are unable to be traversed from their pins/pads they may cause incomplete simulation results for these nets VDD_TOP VDD_1
## VDD_1是VDD_TOP经power switch输出的次一级电源，需要检查前一级power source，如果没有问题，那么就检查pmk库和switch table有没有加错。
2) missing pg arc
ERROR（ITG-016）：Missing PG-arc definitions for cell.
WARNING（SLB-123）: For the cell xx,power pin xx is not associated with any PG arc .
ERROR（SLB-091）：Pgarc derived from upf lib of cell is not complete.
可能的原因是没有读相应的lib，也有可能是lib没有定义pg arc，前者可以在adsRpt/apache.refCell.noLib和apache.refCell.noPwr中check。后者可以在LIB_FILES {...}先定义一个custom的pgarc.lib
LIB_FILES {
pgarc.lib custom
xxx.lib
}
pgarc.lib需要定义成对的pg关系：
cell xx {
pgarc {
VDD VSS
VBP VBN
}
}
3） PG short
ERROR（CCL-054）： ploc：Pad pin <VDD> (type:POWER) at (XX XX)is shorted with (type:GROUND) wire [(XX XX) (XX XX)].
ERROR（PIS-604）：PinInst <xx:VDD> (POWER) has inconsistent type with its connect net <VDD> (GROUND).
pg short先检查指定位置的物理连接，然后检查def里关于pg net的POWER/GROUND属性定义。
