国产代理视频转换DP转LVDS(CS5211替换PS8625/CH7511)，技术支持，性价比超高
DP接口(DisplayPort)是一种图像显示接口，它不仅可以支持全高清显示分辨率(1920×1080)，还能支持4k分辨率(3840×2160)，以及最新的8k分辨率(7680×4320)。DP接口不仅传输率高，而且可靠稳定，其接口传输的信号由传输图像的数据通道信号以及传输图像相关的状态、控制信息的辅助通道信号组成，具体包含DisplayPort数据传输主要通道(Main Link)、辅助通道(AUX Channel)与连接(Link Training)。
LVDS输出接口利用非常低的电压摆幅(约350mV)在两条PCB走线或一对平衡电缆上通过差分进行数据的传输，即低压差分信号传输。采用LVDS输出接口，可以使得信号在差分PCB线或平衡电缆上以几百Mbit/s的速率传输，由于采用低压和低电流驱动方式，因此，实现了低噪声和低功耗。目前，LVDS输出接口在17in及以上液晶显示器中得到了广泛的应用。
DisplayPort to LVDS Convertor
The CS5211 is an eDP to LVDS converter with flexible configuration for the low-cost display system. CS5211 is
compliant with eDP 1.2 and supports 1 lane and 2 lanes mode at 1.62Gbps and 2.7Gbps per lane speed. With
powerful SerDes technology, CS5211 can recover high-speed serial data with a low bit error rate.
CS5211 LVDS transmitter supports single port and two ports mode. The maximum resolution supported by
CS5211 is WUXGA (1920x1200). With 4 configuration pins, CS5211 can support 16 combinations for different
panel resolution and LVDS working mode with one EEPROM image. A convenient tool is also provided to edit,
generate and update EEPROM image for customized configuration.
With optimized design, the usage of CS5211 is apt to save the BoM cost. The clock source is integrated into this
chip, so the external crystal can be saved; with wide range power supporting (1.8 ~ 1.2V for core power), power
device on board could be saved; the total power of CS5211 is less than 300mW, so the power supply network
design could be simplified. It is easy to integrate the CS5211 to a popular low-cost display system.
DP Receiver
Ÿ Compliant with Embedded DisplayPort (eDP) specification 1.2
Ÿ Support 1 or 2 main link lane at either 1.62Gbps or 2.7Gbps link rate.
Ÿ Input color depth 18/24 bit per pixel in RGB format.
Ÿ Support enhanced framing mode.
Ÿ Support VESA and CEA timing standards up to 1920x1200 resolution with 60Hz in 24 bit per pixel mode.
Ÿ Support dynamic refresh rate switching.
Ÿ Support Fast Link Training and Full Link Training.
Ÿ Support eDP Authentication: Alternative Scramble Seed Reset and Alternative Framing.
Ÿ Support HPD Interrupt.
LVDS Output
Ÿ Support 18-bit Single Port, 18-bit Dual Port, 24-bit Single Port and 24-bit Dual Port LVDS output interface.
Ÿ Support both OpenLDI and SPWG bit mapping for LVDS application.
Ÿ Hold LVDS output when input video is not ready.
Ÿ Flexible LVDS output pins swapping.
Ÿ Programmable swing/common mode voltage.
Ÿ Output slew rate control to reduce EMI.
