The ADSP-BF561 processor is a high-performance member of the Blackfin family of products targeting a variety of multimedia and telecommunications applications. At the heart of this device are two independent Analog Devices Blackfin processors. These Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantage of a clean, orthogonal RISC like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The ADSP-BF561 device integrates a general purpose set of digital imaging peripheral creating a complete system on-chip solution for digital imaging and multimedia application.
The ADSP-BF561 processor has 328 KBytes of on-chip memory. Each Blackfin core includes:
- 16K Bytes of Instruction SRAM/Cache
- 16K Bytes of Instruction SRAM
- 32K Bytes of Data SRAM/Cache
- 32K Bytes of Data SRAM
- 4K Bytes of Scratchpad SRAM
Additional on-chip memory peripherals include:
- 128K Bytes of Low Latency On-chip SRAM
- Four Chnanel Internal Memory DMA Controller
- External Memory controller with glueless support for SDRAM, SRAM, and Flash
