mms8916 lk阶段ADC

void adc_test_selc_lcm()
 {
//uint32_t vadc_chan1;
//uint32_t vadc_chan2;
uint32_t vadc_chan3;

uint16_t mpp2_chan = 33;
/*
 * TEST: Read the voltage on batt_id & vbat_sns channels
 */

pm8x41_enable_mpp_as_adc_for_mpp2(1);

//vadc_chan1 = pm8x41_adc_channel_read(batt_id_chan);
//dprintf(INFO, "The channel [%d] voltage is :%d\n",batt_id_chan, vadc_chan1);

//vadc_chan2 = pm8x41_adc_channel_read(vbat_sns_chan);
//dprintf(INFO, "The channel [%d] voltage is :%d\n",vbat_sns_chan, vadc_chan2);

vadc_chan3 = pm8x41_adc_channel_read(mpp2_chan);
dprintf(INFO, "The channel [%d] voltage is :%d\n",mpp2_chan, vadc_chan3);



 } 
pm8x41_adc.c
 
void pm8x41_enable_mpp_as_adc_for_mpp2(uint16_t mpp_num)
 { 
uint32_t val;
if(mpp_num >MPP_MAX_NUM){
dprintf(CRITICAL,"Error: The MPP pin number is unavailable\n");
return;
}
/* set the MPP mode as AIN */
val =(MPP_MODE_AIN <<Q_REG_MODE_SEL_SHIFT)\
|(0x1<<Q_REG_OUT_INVERT_SHIFT)\ 
|(0x0<<Q_REG_SRC_SEL_SHIFT);
REG_WRITE((MPP_REG_BASE +mpp_num *MPP_REG_RANGE +Q_REG_MODE_CTL),val);
/* Enable the MPP */
val =(MPP_MASTER_ENABLE <<Q_REG_MASTER_EN_SHIFT);
REG_WRITE((MPP_REG_BASE +mpp_num *MPP_REG_RANGE +Q_REG_EN_CTL),val);
/* AIN route to AMUX8 */
val =(0x1<<Q_REG_AIN_ROUTE_SHIFT);//AMUX1 
REG_WRITE((MPP_REG_BASE +mpp_num *MPP_REG_RANGE +Q_REG_AIN_CTL),val);
 }